FIG. 1 shows a conventional differential amplifier 8. First and second emitter-coupled transistors Q3, Q4 are connected to receive at their bases a differential voltage signal Vin applied at input terminals 10, 12. A load element ZE (for example, a degenerate resister) couples the emitters of the first and second emitter-coupled transistors Q3, Q4. First and second constant current sources 14, 16 each provide a current I.sub.0 to the emitters of the first and second emitter-coupled transistors Q3, Q4, respectively. A differential output current signal lout, nominally proportional to Vin is provided at output terminals 17, 18.
The gain of the differential amplifier 8 is proportional to Iin. Iin equals ##EQU1## where VBEQ3 and VBEQ4 are the base-emitter voltages of first and second emitter-coupled transistors Q3 and Q4, respectively; and ZE is the value of the degenerate resister.
It is well known that the VBE of a transistor is a logarithmic function of the transistor's collector current. Thus, since in normal operation of the differential amplifier 8, the collector currents of first and second emitter-coupled transistors Q3 and Q4 vary with Vin, the quantity (VBEQ3-VBEQ4) likewise varies with Vin. In particular, when Vin varies over a large range, the difference of VBEQ3 from VBEQ4 varies significantly, especially if Iin approaches the value of I.sub.0. The quantity (VBEQ3-VBEQ4) also varies with variance in the absolute temperature of the environment in which the differential amplifier 8 is operating.
One prior art differential amplifier circuit 20, shown in FIG. 2, addresses this problem. The differential amplifier circuit 20 is disclosed in U.S. Pat. No. 4,769,617 (issued Sep. 6, 1988, to Mizuide). Where the components in FIG. 2 are the same as those in FIG. 1, the same reference numerals are used. Differential amplifier circuit 20 includes a first transistor Q1 interposed between the first current output terminal 17 and the first emitter-coupled transistor Q3. In particular, the collector of the transistor Q1 is connected to the first current output terminal 17 and the emitter of the transistor Q1 is connected to the collector of the first emitter-coupled transistor Q3. Likewise, a second transistor Q2 is interposed between the second output terminal 18 and the second emitter-coupled transistor Q4, the collector of the second transistor Q2 being connected to the second current output terminal 18 and the emitter of the second transistor Q2 being connected to the collector of the second emitter-coupled transistor Q4.
In addition, the amplifier input terminals 10 and 12 are coupled to the bases of the first and second transistors emitter-coupled transistors Q3 and Q4, respectively, by first and second emitter follower transistors Q5 and Q6, respectively. First and second emitter follower transistors Q5 and Q6 are biased with identical currents IE1 and IE2, respectively, from constant current sources 22 and 24, respectively.
Differential amplifier 20 provides a differential current signal at first and second current output terminals 17, 18, equal to ##EQU2## where VBEQ1 through VBEQ6 are the base-emitter voltages of transistors Q1 through Q6, respectively. Since the emitter follower transistors Q5 and Q6 are biased with identical currents IE1 and IE2, respectively, from constant current sources 22, 24, VBEQ5 is equal to VBEQ6.
Furthermore, the emitter of first transistor Q1 is coupled to the base of second emitter-coupled transistor Q4, and the emitter of second transistor Q2 is coupled to the base of first emitter-coupled transistor Q3. Because of the connection of the emitter of first transistor Q1 to the collector of first emitter-coupled transistor Q3, the collector current into first transistor Q1 is ensured to be equal to the collector current into first emitter-coupled transistor Q3. Thus, VBEQ1 is ensured to be equal to VEBQ3. Similarly, because of the connection of the emitter of second transistor Q2 to the collector of second emitter-coupled transistor Q4, the collector current into second transistor Q2 is ensured to be equal to the collector current into second emitter-coupled transistor Q4. Thus, VBEQ2 is ensured to be equal to VBEQ4.
As a result, the output differential current at first and second current output terminals 17, 18, is equal to ##EQU3## regardless of the value of Vin and, furthermore, regardless of the absolute temperature of the environment in which the differential amplifier circuit 20 is operating.
However, a problem with the differential amplifier circuit 20 is that Vin must be kept less than about 0.5 volts in order to keep first and second emitter-coupled transistors Q3, Q4 out of saturation operation. That is, the base-collector voltage of first and second emitter-coupled transistors Q3, Q4 is equal to Vin+(VBEQ1-VBEQ2). VBEQ2 and VBEQ1 are typically within 100 millivolts of each other. If Vin is greater than about 0.5 volts, the base collector voltages of first and second emitter-coupled transistors Q3 and Q4 can exceed the forward bias of the PN junction and thus saturate first and second emitter-coupled transistors Q3 and Q4.